Tsair-Chin Lin is the VP R&D at Cadence Design Systems based in San Francisco, California, United States.
Tsair-Chin Lin
VP R&D at Cadence Design Systems in San Francisco, California, United States
Verified profile
t***@cadence.com
Job Title
VP R&D
Company
Cadence Design Systems
Location
San Francisco, California, United States
Seniority
Vp
Work Email
t***@cadence.com
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Colleagues at Cadence Design Systems
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Inderpreet SinghSenior Principal Product Engineer at Cadence Design SystemsWeinong LaiSr. Member of Consulting Staff at Cadence Design SystemsHimanshu GautamSenior Application Engineer at Cadence Design SystemsSam BordbarStaff Application Engineer at Cadence Design SystemsJoerg MuellerProduct Engineering Architect at Cadence Design SystemsBob GanasFacilities Manager at Cadence Design SystemsGurukiran Malapatiunix/linux system administration at Cadence Design SystemsGreg NelsonSenior Buyer at Cadence Design Systems
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Tsair-Chin Lin's work email follows the pattern t***@cadence.com. Reveal it free.
What does Tsair-Chin Lin do?
Tsair-Chin Lin is the VP R&D at Cadence Design Systems.
Where is Tsair-Chin Lin based?
San Francisco, California, United States.
Who is the VP R&D at Cadence Design Systems?
Tsair-Chin Lin.
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